I recently acquired an Apple III which was not able to boot so I thought it would be a good opportunity to drop-in my MCL65+ to replace the 6502 to help debug the motherboard. It is a beautiful machine which included the Apple III monitor and an external disk drive. It is the first model which contains a 12V memory card.

I wrote some code to have the MCL65+ perform an infinite read loop from ROM address 0xFFFF which should have resulted in activity on the ROM’s chip select line but did not.

Starting at the ROM, I traced the net back through every IC in the path, back to the source which ended up being an Apple PLD. It appeared to have a bad output driver which could drive to a logic ‘1’ but not to a ‘0’.

I added a 680 ohm pulldown to this signal help the chip bring the voltage level to zero which seemed to work quite well. The machine was then able to boot from the ROM and begin trying to load the OS from the disk drive. It was a step in the right direction but the machine could still not load the SOS operating system.

This is the resistor which I placed at the input of the AND gate:

And this is the source IC which is an Apple PLD. The chip was extremely hot, but I’m not sure if it was because the chip is damaged or if it is always this hot. Many of the other Apple PLDs are also hot…

It is my understanding that the Apple III will operate at a clock speed of 2 Mhz when accessing some address ranges and 1 Mhz for others, so I worry that my 680 ohm pulldown solution may not work at the faster clock speed. I looked over the schematic for a way to force the motherboard to run full-time at 1 Mhz.

The solution was to bend pin-9 of the 6522 so that it no longer can drive the signal SEL2M_n low which switches the clock speed. With this pin disconnected the pull-up on the signal should keep the speed always at 1 Mhz.

This is the circuit from the schematic. SEL2M_n is sourced by the 6522 and goes into an Apple PLD which then controls the ability of the system to run at 2 Mhz depending on which address is being accessed.

With the motherboard clock speed fixed to 1 Mhz it makes this the world’s slowest Apple III. 🙂

I dont think this will cause any compatibility issues because my observation was that anytime the CPU access I/O such as the disk drive, the machine would switch to 1 Mhz. I think it only runs at 2 Mhz when the CPU is executing out of memory.

I ran the Apple III Confidence memory test program which helped me locate a few bad DRAMS on the 12V memory board which I replaced with chips donated from my Apple II+.

After this, the machine appears to be fixed! It can boot SOS and I can run a number of other applications. The computer is a bit slower than stock but I believe it is a worthwhile tradeoff if the motherboard ICs will run cooler and extend their lives.